JPH0325101B2 - - Google Patents

Info

Publication number
JPH0325101B2
JPH0325101B2 JP59204731A JP20473184A JPH0325101B2 JP H0325101 B2 JPH0325101 B2 JP H0325101B2 JP 59204731 A JP59204731 A JP 59204731A JP 20473184 A JP20473184 A JP 20473184A JP H0325101 B2 JPH0325101 B2 JP H0325101B2
Authority
JP
Japan
Prior art keywords
clock
signal
circuit
code
data signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59204731A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6187446A (ja
Inventor
Akihiro Yanai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP59204731A priority Critical patent/JPS6187446A/ja
Priority to US06/775,565 priority patent/US4689785A/en
Publication of JPS6187446A publication Critical patent/JPS6187446A/ja
Publication of JPH0325101B2 publication Critical patent/JPH0325101B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/407—Bus networks with decentralised control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP59204731A 1984-09-14 1984-09-28 クロツク同期方式 Granted JPS6187446A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP59204731A JPS6187446A (ja) 1984-09-28 1984-09-28 クロツク同期方式
US06/775,565 US4689785A (en) 1984-09-14 1985-09-13 Data transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59204731A JPS6187446A (ja) 1984-09-28 1984-09-28 クロツク同期方式

Publications (2)

Publication Number Publication Date
JPS6187446A JPS6187446A (ja) 1986-05-02
JPH0325101B2 true JPH0325101B2 (en]) 1991-04-05

Family

ID=16495377

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59204731A Granted JPS6187446A (ja) 1984-09-14 1984-09-28 クロツク同期方式

Country Status (1)

Country Link
JP (1) JPS6187446A (en])

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4167760A (en) * 1978-03-28 1979-09-11 Ampex Corporation Bi-phase decoder apparatus and method
JPS6016145B2 (ja) * 1979-03-20 1985-04-24 株式会社日立製作所 クロツク信号抽出方式

Also Published As

Publication number Publication date
JPS6187446A (ja) 1986-05-02

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